Hitachi SH7032 - Contention between TCNT Word Write and Increment

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10.6.2 Contention between TCNT Word Write and Increment
If an increment pulse occurs in the T3 state of a TCNT word write cycle, writing takes priority and
TCNT is not incremented. The timing is shown in figure 10.59.
T1
T3T2
CK
Address
Internal write signal
TCNT input clock
TCNT
TCNT word write cycle by CPU
TCNT address
N
M
TCNT write data
Figure 10.59 Contention between TCNT Word Write and Increment