566
A.2.2 Bit Rate Register (BRR) SCI
• Start Address: H'5FFFEC1 (channel 0), H'5FFFEC9 (channel 1)
• Bus Width: 8/16
Register Overview:
Bit: 7 6 5 4 3 2 1 0
Bit name:
Initial value: 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Table A.4 BBR Bit Functions
Bit Bit name Description
7–0 (Bit rate setting) Set serial transmission/reception bit rate
A.2.3 Serial Control Register (SCR) SCI
• Start Address: H'5FFFEC2 (channel 0), H'5FFFECA (channel 1)
• Bus Width: 8/16
Register Overview:
Bit: 7 6 5 4 3 2 1 0
Bit name: TIE RIE TE RE MPIE TEIE CKE1 CKE0
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W