587
A.2.23 Timer Output Control Register (TOCR) ITU
• Start Address: H'5FFFF31
• Bus Width: 8
Register Overview:
Bit: 7 6 5 4 3 2 1 0
Bit name: — — — — — — OLS4 OLS3
Initial value: * 1111111
R/W: — — — — — — R/W R/W
Note: *Undetermined
Table A.24 TOCR Bit Functions
Bit Bit name Value Description
1 Output level select 4 (OLS4) 0 Reverse output of TIOCA3, TIOCA4, TIOCB4
1 Direct output of TIOCA3, TIOCA4, TIOCB4
(Initial value)
0 Output level select 3 (OLS3) 0 Reverse output of TIOCB3, TOCXA4, TOCXB4
1 Direct output of TIOCB3, TOCXA4, TOCXB4
(Initial value)