Hitachi SH7032 - Programmable Timing Pattern Controller and I;O Port Timing

510
t
TCKS
CK
t
TCKWH
t
TCKWL
t
TCKS
TCLKA– 
TCLKD
Figure 20.37 ITU Clock Input Timing
(6) Programmable Timing Pattern Controller and I/O Port Timing
Table 20.10 Programmable Timing Pattern Controller and I/O Port Timing
Case A: V
CC
= 3.0 to 5.5 V, AV
CC
= 3.0 to 5.5 V, AV
CC
= V
CC
±10%, AV
ref
= 3.0 V to AV
CC
,
V
SS
= AV
SS
= 0 V, φ = 12.5 MHz, Ta = –20 to +75°C
*
Case B: V
CC
= 5.0 V ±10%, AV
CC
= 5.0 V ±10%, AV
CC
= V
CC
±10%, AV
ref
= 4.5 V to AV
CC
,
V
SS
= AV
SS
= 0 V, φ = 20 MHz, Ta = –20 to +75°C
*
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Cases A and B
Item Symbol Min Max Unit Figure
Port output delay time t
PWD
— 100 ns 20.38
Port input hold time t
PRH
50 — ns
Port input setup time t
PRS
50 — ns