Hitachi SH7032 - Port B I;O Register (PBIOR)

433
• Bits 1 and 0 (PA0 Mode (PA0MD1 and PA0MD0)): PA0MD1 and PA0MD0 select the
function of the PA0/CS4/TIOCA0 pin.
Bit 1: PA0MD1 Bit 0: PA0MD0 Function
0 0 Input/output (PA0)
1 Chip select output (CS4) (Initial value)
1 0 ITU input capture/output compare (TIOCA0)
1 Reserved
15.3.3 Port B I/O Register (PBIOR)
The port A I/O register (PAIOR) is a 16-bit read/write register that selects input or output for the
16 pins of port A. Bits PB15IOR–PB0IOR correspond to pins of port B. PBIOR is enabled when
the port B pins function as input/outputs (PB15–PB0), for ITU input capture and output compare
(TIOCA4, TIOCA3, TIOCA2, TIOCB4, TIOCB3, and TIOCB2), and as serial clocks (SCK1,
SCK0). For other functions, they are disabled. For port B pin functions PB15–PB0, and TIOCA4,
TIOCA3, TIOCA2, TIOCB4, TIOCB3, and TIOCB2, and SCK1/SCK0, a given pin in port B is an
output pin if its corresponding PBIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PBIOR is initialized to H'0000 by a power-on reset; however, it is not initialized by a manual
reset, or in standby mode or sleep mode.
Bit: 15 14 13 12 11 10 9 8
Bit name: PB15
IOR
PB14
IOR
PB13
IOR
PB12
IOR
PB11
IOR
PB10
IOR
PB9
IOR
PB8
IOR
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7 6 5 4 3 2 1 0
Bit name: PB7
IOR
PB6
IOR
PB5
IOR
PB4
IOR
PB3
IOR
PB2
IOR
PB1
IOR
PB0
IOR
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W