Hitachi SH7032 - A;D Control;Status Register (ADCSR) A;D; A;D Data Register AH-DL (ADDRAH-ADDRL) A;D

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A.2.7 A/D Data Register AH–DL (ADDRAH–ADDRL) A/D
• Start Address: H'5FFFEE0, H'5FFFEE1, H'5FFFEE2, H'5FFFEE3, H'5FFFEE4, H'5FFFEE5,
H'5FFFEE6, H'5FFFEE7
• Bus Width: 8/16
Register Overview:
Bit: 15 14 13 12 11 10 9 8
Bit name: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
Initial value: 0 0 0 0 0 0 0 0
R/W: R R R R R R R R
Bit: 7 6 5 4 3 2 1 0
Bit name: AD1 AD0 — — — — — —
Initial value: 0 0 0 0 0 0 0 0
R/W: R R R R R R R R
Table A.8 ADDRAH–ADDRL Bit Functions
Bit Bit name Description
15–8 A/D data 9–2 Stores upper 8 bits of A/D conversion result
7,6 A/D data 1, 0 Stores upper 2 bits of A/D conversion result
A.2.8 A/D Control/Status Register (ADCSR) A/D
• Start Address: H'5FFFEF8
• Bus Width: 8/16
Register Overview:
Bit: 7 6 5 4 3 2 1 0
Bit name: ADF ADIE ADST SCAN CKS CH2 CH1 CH0
Initial value: 0 0 0 0 0 1 0 0
R/W: R/(W)
*
R/W R/W R/W R/W R/W R/W R/W
Note: *Only 0 can be written, to clear the flag.