Hitachi SH7032 - Control Signal Timing; Case A: VCC = 3.0 to 5.5 V, AV; 10%, Av V = Av; CC = 3.0 to 5.5 V, AV SS = AV SS

474
(2) Control Signal Timing
Table 20.5 Control Signal Timing
Case A: V
CC
= 3.0 to 5.5 V, AV
CC
= 3.0 to 5.5 V, AV
CC
= V
CC
±10%, AV
ref
= 3.0 V to AV
CC
,
V
SS
= AV
SS
= 0 V, Ta = –20 to +75°C
*
)
Case B: V
CC
= 5.0 V ±10%, AV
CC
= 5.0 V ±10%, AV
CC
= V
CC
±10%, AV
ref
= 4.5 V to AV
CC
,
V
SS
= AV
SS
= 0 V, Ta = –20 to +75°C
*
)
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Case A Case B
12.5 MHz 20 MHz
Item Symbol Min Max Min Max Unit Figure
RES setup time t
RESS
320 — 200 — ns 20.4
RES pulse width t
RESW
20 — 20 — t
cyc
NMI reset setup time t
NMIRS
320 — 200 — ns
NMI reset hold time t
NMIRH
320 — 200 — ns
NMI setup time t
NMIS
160 — 100 — ns 20.5
NMI hold time t
NMIH
80 — 50 — ns
IRQ0–IRQ7 setup time (edge
detection)
t
IRQES
160 — 100 — ns
IRQ0–IRQ7 setup time (level
detection)
t
IRQLS
160 — 100 — ns
IRQ0–IRQ7 hold time t
IRQEH
80 — 50 — ns
IRQOUT output delay time t
IRQOD
— 80 — 50 ns 20.6
Bus request setup time t
BRQS
80 — 50 — ns 20.7
Bus acknowledge delay time 1 t
BACD1
— 80 — 50 ns
Bus acknowledge delay time 2 t
BACD2
— 80 — 50 ns
Bus 3-state delay time t
BZD
— 80 — 50 ns