Hitachi SH7032 - Bus Control Register (BCR) BSC

606
A.2.40 Bus Control Register (BCR) BSC
• Start Address: H'5FFFFA0
• Bus Width: 8/16/32
Register Overview:
Bit: 15 14 13 12 11 10 9 8
Bit name: DRAME IOE WARP RDDTY BAS — — —
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W — — —
Bit: 7 6 5 4 3 2 1 0
Bit name: — — — — — — — —
Initial value: 0 0 0 0 0 0 0 0
R/W: — — — — — — — —
Table A.41 BCR Bit Functions
Bit Bit Name Value Description
15 DRAM enable (DRAME) 0 Area 1 is external memory space
(Initial value)
1 Area 1 is DRAM space
14 Multiplex I/O enable (IOE) 0 Area 6 is external memory space
(Initial value)
1 Area 6 is address/data multiplex I/O space
13 Warp mode (WARP) 0 Normal mode: External access and internal
access not performed simultaneously
(Initial value)
1 Warp mode: External access and internal
access performed simultaneously
12 RD duty (RDDTY) 0 RD signal high width duty ratio is 50%
(Initial value)
1 RD signal high width duty ratio is 35%
11 Byte access select (BAS) 0 WRH, WRL, and A0 signals valid
(Initial value)
1 WR, HBS, and LBS and signals valid