Hitachi SH7032 - A;D Control Register (ADCR) A;D; Timer Start Register (TSTR) ITU

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A.2.9 A/D Control Register (ADCR) A/D
• Start Address: H'5FFFEE9
• Bus Width: 8/16
Register Overview:
Bit: 7 6 5 4 3 2 1 0
Bit name: TRGE — — — — — — —
Initial value: 0 1 1 1 1 1 1 1
R/W: R/W — — — — — — —
Table A.10 ADCR Bit Functions
Bit Bit name Value Description
7 Trigger enable bit (TRGE) 0 Start of A/D conversion by external trigger disabled
(Initial value)
1 Start of A/D conversion by rising edge of external
conversion trigger input pin (ADTRG) enabled
A.2.10 Timer Start Register (TSTR) ITU
• Start Address: H'5FFFF00
• Bus Width: 8
Register Overview:
Bit: 7 6 5 4 3 2 1 0
Bit name: — — — STR4 STR3 STR2 STR1 STR0
Initial value: 1 1 1 0 0 0 0 0
R/W: — — — R/W R/W R/W R/W R/W