584
A.2.20 General Registers B0–4 (GRB0–GRB4) ITU
•  Start Address: H'5FFFF0C (channel 0), H'5FFFF16 (channel 1), H'5FFFF20 (channel 2),
H'5FFFF2A (channel 3), H'5FFFF3A (channel 4)
•  Bus Width: 8/16/32
Register Overview:
Bit: 15 14 13 12 11 10 9 8
Bit name:
Initial value: 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7 6 5 4 3 2 1 0
Bit name:
Initial value: 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Table A.21 GRB0–GRB4 Bit Functions
Bit Bit name Description
15–0 Registers used for both output
compare and input capture
Output compare register: Set with compare match
output
Input capture register: Stores the TCNT value when the
input capture signal is generated