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Hitachi SH7032 - Contention between TCNT Write and Overflow;Underflow

Hitachi SH7032
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10.6.5 Contention between TCNT Write and Overflow/Underflow
If an overflow occurs in the T3 state of a TCNT write cycle, writing takes priority over counter
incrementing. OVF is set to 1. The same applies to underflows. The timing is shown in figure
10.62.
T1T2 T3
TCNT write cycle
TCNT address
H'FFFF M
TCNT write data
CK
Address
Internal
write signal
TCNT
input clock
Overflow
signal
TCNT
OVF
Figure 10.62 Contention between TCNT Write and Overflow

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