Hitachi SH7032 - Programmable Timing Pattern Controller and I;O Port Timing

548
t
TCKS
CK
t
TCKWH
t
TCKWL
t
TCKS
TCLKA– 
TCLKD
Figure 20.68 ITU Clock Input Timing
(6) Programmable Timing Pattern Controller and I/O Port Timing
Table 20.23 Programmable Timing Pattern Controller and I/O Port Timing
Conditions: V
CC
= 3.3 V ±0.3V, AV
CC
= 3.3 V ±0.3V, AV
CC
= V
CC
±0.3V, AV
ref
= 3.0 V to
AV
CC
, V
SS
= AV
SS
= 0 V, φ = 12.5 to 20 MHz
*
1
, Ta = –20 to +75°C
*
2
Notes: *1 ROMless products only for 20 MHz version
*2 Regular-specification products; for wide-temperature-range products, Ta = –40 to
+85°C
Item Symbol Min Max Unit Figure
Port output delay time t
PWD
— 100 ns 20.69
Port input hold time t
PRH
50 — ns
Port input setup time t
PRS
50 — ns
t
PRS
CK
t
PWD
Ports A–C
(Read)
Ports A–C
(Write)
T
1
T
2
T
3
t
PRH
Figure 20.69 Programmable Timing Pattern Controller Output Timing