Hitachi SH7032 - Initial Values of Registers; System Registers

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2.1.3 System Registers
System registers consist of four 32-bit registers: multiply and accumulate registers high and low
(MACH and MACL), procedure register (PR), and program counter (PC). The multiply and
accumulate registers store the results of multiply and accumulate operations. The procedure
register stores the return address for a subroutine procedure. The program counter stores program
addresses to control the flow of the processing.
MACL
PR
PC
(Sign extended)
MACH
31 9 0
0
0
31
31
Multiply and accumulate (MAC) registers
high and low (MACH, MACL): Store the
results of multiply and accumulate opera-
tions. MACH is sign-extended when read

because only the lowest 10 bits are valid.
Procedure register (PR): Stores the return

address for a subroutine procedure.
Program counter (PC): Indicates the 
fourth byte (second instruction) after 
the current instruction.
Figure 2.3 System Registers
2.1.4 Initial Values of Registers
Table 2.1 lists the values of the registers after reset.
Table 2.1 Initial Values of Registers
Classification Register Initial Value
General registers R0–R14 Undefined
R15 (SP) Value of the stack pointer in the vector address table
Control registers SR Bits I3–I0 are 1111(H'F), reserved bits are 0, and other
bits are undefined
GBR Undefined
VBR H'00000000
System registers MACH, MACL, PR Undefined
PC Value of the program counter in the vector address table