Hitachi SH7032 - Page 238

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Table 9.6 Relationship of Request Modes and Bus Modes by DMA Transfer Category
Address
Mode Transfer Category
Request
Mode
Bus
Mode
Transfer
Size
(bits)
Usable
Channels
Single External device with DACK and
external memory
External B/C 8/16 0,1
External device with DACK and
memory-mapped external device
External B/C 8/16 0, 1
Dual External memory and external
memory
All
*
1
B/C 8/16 0–3
*
5
External memory and memory-
mapped external device
All
*
1
B/C 8/16 0–3
*
5
Memory-mapped external device and
memory-mapped external device
All
*
1
B/C 8/16 0–3
*
5
External memory and on-chip
memory
All
*
1
B/C 8/16 0–3
*
5
External memory and on-chip
supporting module
All
*
2
B/C
*
3
8/16
*
4
0–3
*
5
Memory-mapped external device and
on-chip memory
All
*
1
B/C 8/16 0–3
*
5
Memory-mapped external device and
on-chip supporting module
All
*
2
B/C
*
3
8/16
*
4
0–3
*
5
On-chip memory and on-chip
memory
All
*
1
B/C 8/16 0–3
*
5
On-chip memory and on-chip
supporting module
All
*
2
B/C
*
3
8/16
*
4
0–3
*
5
On-chip supporting module and on-
chip supporting module
All
*
2
B/C
*
3
8/16
*
4
0–3
*
5
B: Burst, C: Cycle steal
Notes: *1 External requests, auto requests and on-chip supporting module requests are all
available. For on-chip supporting module requests, however, SCI and A/D converter
cannot be specified as the transfer request source.
*2 External requests, auto requests and on-chip supporting module requests are all
available. When the SCI or A/D converter is also the transfer request source, however,
the transfer destination or transfer source must be the SCI or A/D converter,
respectively.
*3 If the transfer request source is the SCI, cycle-steal only.
*4 The access size permitted when the transfer destination or source is an on-chip
supporting module register.
*5 If the transfer request is an external request, channels 0 and 1 only.