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Hitachi SH7032 - Page 296

Hitachi SH7032
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261
Input capture timing
Input capture on the rising edge, falling edge, or both edges can be selected by settings in
TIOR. Figure 10.25 shows the timing when the rising edge is selected. The pulse width of the
input capture signal must be at least 1.5 system clocks for single-edge capture, and 2.5 system
clocks for capture of both edges.
N
CK
Input capture
input
TCNT
Input capture
signal
GRA/GRB
N
Figure 10.25 Input Capture Signal Timing

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