275
N–1 NN + 1N N–1TCNT3
GRA3
IMFA
Buffer transfer
signal (BR to GR)
GR
Set to 1
N
Buffer transfer performed
Flag not set
Buffer transfer
not performed
Figure 10.36 Overshoot Timing
GR
Buffer transfer
signal (BR to GR)
TCNT4 H' 0001 H' 0000 H' FFFF H' 0000
Underflow
Flag not set
Set to 1
Buffer transfer performed
Buffer transfer
not performed
OVF
Overflow
Figure 10.37 Undershoot Timing
The IMFA bit of channel 3 is set to 1 for increment pulses and the OVF bit of channel 4 is set to 1
for underflows only. The buffer register (BR) set for the buffer operation is transferred to GR upon
compare match A3 (when incrementing) or TCNT4 underflow.
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