Hitachi SH7032 - Page 560

525
CK
RES
NMI
t
RESS
t
RESS
t
NMIRS
t
RESW
t
NMIRH
Figure 20.48 Reset Input Timing
IRQ edge
NMI
t
NMIS
CK
t
NMIH
t
IRQES
t
IRQEH
IRQ level
t
IRQLS
Figure 20.49 Interrupt Signal Input Timing
IRQOUT
CK
t
IRQOD
t
IRQOD
Figure 20.50 Interrupt Signal Output Timing