Hitachi SH7032 - Page 565

530
Table 20.20 Bus Timing (2)
Conditions: V
CC
= 3.3 V ±0.3V, AV
CC
= 3.3 V ±0.3V, AV
CC
= V
CC
±0.3V, AV
ref
= 3.0 V to
AV
CC
, V
SS
= AV
SS
= 0 V, φ = 12.5 MHz, Ta = –20 to +75°C
*
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Item Symbol Min Max Unit Figures
Address delay time t
AD
— 40 ns 20.52, 20.53, 20.55–
20.58, 20.63, 20.64
CS delay time 1 t
CSD1
— 40 ns 20.52, 20.53, 20.64
CS delay time 2 t
CSD2
—40ns
CS delay time 3 t
CSD3
— 40 ns 20.63
CS delay time 4 t
CSD4
—40ns
Access time 1
*
4
35% duty
*
1
t
RDAC1
t
cyc
× 0.65 – 35— ns 20.52
from read strobe
50% duty t
cyc
× 0.5 – 35 — ns
Access time 2
*
4
from read strobe
35% duty
*
1
t
RDAC2
t
cyc
× (n+1.65)
– 35
*
2
— ns 20.53, 20.54
50% duty t
cyc
× (n+1.5)
– 35
*
2
—ns
Access time 3
*
4
from read strobe
35% duty
*
1
t
RDAC3
t
cyc
× (n+0.65)
– 35
*
2
— ns 20.63
50% duty t
cyc
× (n+0.5)
– 35
*
2
—ns
Read strobe delay time t
RSD
— 40 ns 20.52, 20.53, 20.55–
20.59, 20.63
Read data setup time t
RDS
25 — ns 20.52, 20.53, 20.55–
20.58, 20.63
Read data hold time t
RDH
0—ns
Write strobe delay time 1 t
WSD1
— 40 ns 20.53, 20.57, 20.58,
20.63, 20.64
Write strobe delay time 2 t
WSD2
— 30 ns 20.53, 20.57, 20.58,
20.63
Write strobe delay time 3 t
WSD3
— 40 ns 20.55, 20.56
Write strobe delay time 4 t
WSD4
— 40 ns 20.55, 20.56, 20.64