Hitachi SH7032 - Page 592

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Table A.2 16-bit Access Space (In Principle, 8-Bit, 16-Bit and 32-Bit Accessible)
Bit Name
Address Register 7 6 5 43210Module
H'5FFFF00 TSTR
*
1
— — — STR4 STR3 STR2 STR1 STR0
H'5FFFF01 TSNC
*
1
— — — SYNC4 SYNC3 SYNC2 SYNC1 SYNC0
H'5FFFF02 TMDR
*
1
— MDF FDIR PWM4 PWM3 PWM2 PWM1 PWM0
H'5FFFF03 TFCR
*
1
— — CMD1 CMD0 BFB4 BFA4 BFB3 BFA3
H'5FFFF04 TCR0
*
1
— CCLR1 CCLR0 CKEG1 CKEG0 TPSC2 TPSC1 TPSC0
H'5FFFF05 TIOR0
*
1
— IOB2 IOB1 IOB0 — IOA2 IOA1 IOA0
H'5FFFF06 TIER0
*
1
— — — — — OVIE IMIEB IMIEA
H'5FFFF07 TSR0
*
1
— — — — — OVF IMFB IMFA
H'5FFFF08 TCNT0
H'5FFFF09
H'5FFFF0A GRA0
H'5FFFF0B
H'5FFFF0C GRB0
H'5FFFF0D
H'5FFFF0E TCR1
*
1
— CCLR1 CCLR0 CKEG1 CKEG0 TPSC2 TPSC1 TPSC0
H'5FFFF0F TIORL
*
1
— IOB2 IOB1 IOB0 — IOA2 IOA1 IOA0
H'5FFFF10 TIERl
*
1
— — — — — OVIE IMIEB IMIEA
H'5FFFF11 TSR1
*
1
— — — — — OVF IMFB IMFA
H'5FFFF12 TCNT1
H'5FFFF13
H'5FFFF14 GRA1
H'5FFFF15
H'SFFFF16 GRB1
H'5FFFF17
H'5FFFF18 TCR2
*
1
— CCLR1 CCLR0 CKEG1 CKEG0 TPSC2 TPSC1 TPSC0
H'5FFFF19 TIOR2
*
1
— IOB2 IOB1 IOB0 — IOA2 IOA1 IOA0
H'5FFFF1A TIER2
*
1
— — — — — OVIE IMIEB IMIEA
H'5FFFF1B TSR2
*
1
— — — — — OVF IMFB IMFA
H'5FFFF1C TCNT2
H'5FFFF1D
H'5FFFF1E GRA2
H'5FFFF1F
H'5FFFF20 GRB2
H'5FFFF21
ITU
(chan-
nels 0–4
shared)
ITU
(chan-
nel 0)
ITU
(chan-
nel 1)
ITU
(chan-
nel 2)