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Hitachi SH7032
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25
Table 2.8 Addressing Modes and Effective Addresses (cont)
Addressing
Mode
Mnemonic
Expression Effective Addresses Calculation Equation
Indirect
register
addressing
with
displace-
ment
@(disp:4, Rn) The effective address is Rn plus a 4-bit
displacement (disp). disp is zero-extended, and
remains the same for a byte operation, is doubled
for a word operation, and is quadrupled for a
longword operation.
Rn
Rn + disp × 1/2/4
+
×
1/2/4
disp
(zero-extended)
Byte: Rn +
disp
Word: Rn +
disp × 2
Longword:
Rn + disp × 4
Indirect
indexed
register
addressing
@(R0, Rn)
Rn
R0
Rn + R0
+
Rn + R0
Indirect
GBR
addressing
with
displace-
ment
@(disp:8,
GBR)
The effective address is the GBR value plus an 8-
bit displacement (disp). The value of disp is zero-
extended, and remains the same for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
GBR
1/2/4
GBR
+ disp × 1/2/4
+
×
disp
(zero-extended)
Byte: GBR +
disp
Word: GBR +
disp × 2
Longword:
GBR + disp ×
4
Indirect
indexed
GBR
addressing
@(R0, GBR) The effective address is the GBR value plus the R0
value.
GBR
R0
GBR + R0
+
GBR + R0

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