Al
Front
Panel
The A1 front panel assembly provides user interface with the analyzer. It
includes the keyboard for local user inputs, and the front panel
LEDs
that
indicate instrument status The RPG (rotary pulse generator) is not electrically
connected to the front panel, but provides user inputs directly to the front
panel processor.
A2
Front
Panel Processor
The A2 front panel processor detects and decodes user inputs from the front
panel and the RPG, and transmits them to the CPU. It has the capability to
interrupt the CPU to provide information updates. It controls the front panel
LEDs
that provide status information to the user.
The
A2
also contains the LVDS (low voltage differential signaling) receivers
which connect to the graphics processor. The received video signals are routed
to the
Al8
display.
A9
CPU/A10
Digital IF
The
A9
CPU assembly contains the main CPU (central processing unit), the
digital
signal processor, memory storage, and interconnect port interfaces
The main CPU is the master controller for the analyzer, including the other
dedicated microprocessors The memory includes EEPROM, DRAM, flash ROM,
SRAM and boot ROM.
Data from the receiver is serially clocked into the A9 CPU assembly from
the
A10
digital IF’. The data taking sequence is triggered either from the
Al4
fractional-N assembly, externally from the rear panel, or by software on the
A9 assembly.
MdlCPU
The main CPU is a
32-bit
microprocessor that maintains
digital
control over the
entire instrument through the instrument
bus
The main CPU receives external
control information from the front panel or HP-IB, and performs processing
and formatting operations on the raw data in the main RAM. It controls the
digital
signaI
processor, the front panel processor, the display processor, and
the interconnect port interfaces. In addition, when the analyzer is in the
system controller mode, the main CPU controls peripheral devices through the
peripheral port interfaces
12-10
Thsoryof
Operation