HP 8753E - Page 593

transfer switch, 12-26
bus
analog, lo-22
bus nodes, 19-26
c
cable inspection, 6-16
cables, l-4
bottom view, 13-12
front view, 13-14
part numbers, 13-19-18
rear view, 13-16
source, 13-18
top view, 13-10
cable test, 9-5
Cal Coef l-12., 10-12
CAL FACTOR SENSOR A, 16-6
CAL FACTOR SENSOR B, 19-6
CALJBRATION ABORTED, lo-50
calibration coefficients, 11-l
calibration device inspection, 9-3
calibration kit 7 mm, 569, l-3
calibration kit device verification,
9-4
calibration kit Type-N, 758, l-3
calibration procedure, 1 l-3
CALIBRATION REQUIRED, lo-51
care of connectors, l-5
CAUTION
OVERLOAD ON INPUT A, POWER
REDUCED, 8-3
OVERLOAD ON INPUT B, POWER
REDUCED, 8-3
OVERLOAD ON INPUT R, POWER
REDUCED, 8-3
cavity oscillator frequency
adjustment, 3-28
cavity oscillator frequency correction
constants adjustment, 3-28
Cav osc Cor., 19-13
CC procedures
ADC offset (test 52), 3-17
analog bus (test 46), 3-9
cavity oscillator frequency (test
54), 3-28
IF amplifier (test 51), 3-16
initialize EEPROMs (test 58), 3-37
option numbers (test 56), 3-36
retrieve correction constant data
from EEPROM backup disk,
3-40
RF output power (test 47), 3-11
sampler magnitude (test 53), 3-18
serial number (test 55), 3-34
source default (test 44), 3-7
source pretune default (test 45),
3-8
source prettme (test 48), 3-10
Unprotected Hardware Option
Numbers, 3-60
center conductor damage, 9-3
certification of kit, 2-7
chassis
part numbers, 13-42-44
check
1st LO signal at sampler/mixer,
8-14
4 MHz REF signal, 8-7
A10 by substitution or signal
examination, 8-8
All phase lock, 7-35
Al2 digital control signals, 7-23
Al2 reference, 7-13
A13/A14 Fractional-N, 7-24
Al4 Divide-by-N Circuit Check,
7-29
A14-to-Al3 digital control signals,
7-29
Al5 Preregulator, 5-9
Al/A2 front panel, 6-13
A3 source and All phase lock, 7-8
A4 sampler/mixer, 7-6