Intel 8253 - Page 241

An A/D Conversion Classification
Multiplexing
Time Interweave
Pipeline
Parallel
Flash
Stacking
Flash
Neural
Network
Series-
Parallel
Subranging
Subranging with
Folding Amps
Ripple
Serial Coarse-
Fine
Counting
Coarse-FineNon-Algorithmic
Successive
Approximation
Charge
Redistribution
Variable Ref.
Serial Ripple
Pulse Width
Ramp
Comparison
Dual Slopes
Constant
Slope
Algorithmic Iterative
Cyclic
Sample/Hold
Pulse Rate
Ramp Comparison
Quantized Feedback
Algorithmic Replicative
Straight Binary
Gray
Tracking Feedback
Servo
Delta Modulation
Note: The procedure and architecture
are shown as
Procedure
Architecture
Analog and mixed Signal Center, TAMU (ESS)