XA User Guide 7-2 4/17/98
subsequent read or write operation. The active high ALE signal directs the external latch to allow
information to be stored for a data address or a code address. The external latch must close and
retain this address when the ALE signal ends, by going low (inactive).
7.1.6 Address Lines
Some of the address lines used by the external bus interface are driven during a complete bus
operation and do not need to be latched. In the standard XA bus interface, the lower four address
lines are always driven and unlatched in this manner. This is done specifically as part of the
optimization of the bus for fetching instructions from external code memory at high speed. This
feature will be explained in detail in a later section.
7.1.7 Multiplexed Address and Data Lines
The part of the bus that is used for data transfer is also used for address output from the XA.
Prior to asserting the strobe for the bus operation about to be performed, the XA outputs the
address for the operation. On the multiplexed portion of the bus, this address is captured by an
external latch, as commanded by the ALE signal. After that is done, this part of the bus is free to
be used for data transfer either into or out of the XA. The control signals
PSEN, RD, WRL, and
WRH determine what type of bus operation takes place.
7.1.8 WAIT - Wait
The WAIT input allows wait states to be inserted into any external bus operation. If WAIT is
asserted (high) after a bus control strobe (
PSEN, RD, WRL, or WRH) is driven by the XA, that
bus operation is stretched, and that control strobe continues to be driven by the XA until WAIT
goes low again. For this feature to be used, an external circuit must be present to generate the
WAIT signal at the appropriate times.
The XA has an internal bus configuration feature that allows programming the various types of
external bus cycles to different lengths, so that in most applications the WAIT line will not be
needed. This feature will be explained in detail in a later section.
7.1.9
EA - External Access
The
EA input determines whether the XA operates in single-chip mode, or begins running code
from the internal program memory after reset. If
EA is low as Reset goes high, the first code
fetch (and all others after that) is made off-chip. If
EA is high as Reset goes high, the XA will
execute the on-chip code first, but will still attempt to execute instructions from external memory
at addresses above the limit of on-chip code. The level on the
EA pin is latched as reset goes
high, so whatever mode is selected remains valid until the next reset.
On some XA derivatives, the pin used for the EA function may be shared with another function
that becomes active after the XA begins code execution.
To Next Page
Loading...