Intel 8253 - Stack Overflow

XA User Guide 4-16 3/24/97
The stack should always be word-aligned. If the SP (R7) is modified to an odd value, the
offending LSB of the stack pointer is ignored and the word at the next-lower even address is
accessed.
Note that neither PUSH or POP operations have any effect on the PSW flags.
4.7.3 Stack-Based Addressing
Stack-based data addressing is fully supported by the XA. R0 through R7 may be used in all
indexed address modes; the stack pointer in R7 is equally valid as an index.
Figure 4.14 illustrates an example of stack-based addressing. The segment used for stack relative
addressing is always the same as for other stack operations (Segment 0 for System mode code
and DS for User mode code).
Note that the precautions mentioned in section 3.3.4 apply here: when referencing a word
quantity, the final (effective) address must be even, otherwise incorrect data will be accessed.
This topic is discussed further in the section Stack Pointer Misalignment.
4.7.4 Stack Errors
Special attention is required to avoid problems due to stack overflow, stack underflow, and stack
pointer misalignment
Stack Overflow
Stack overflow occurs when too many items are pushed, either explicitly or as the result of
interrupts. As items are pushed on to the stack, it may grow downward past the memory
allocated to it. It is not always possible for programs to detect stack overflow, so the XA triggers
a Stack Overflow Exception Interrupt whenever the value of the current stack pointer (SSP or
USP) decrements from 80h to 7Eh (simply setting SP to a value lower than 80h would NOT
cause a stack overflow). This value was chosen so that stack space sufficient to handle a stack
overflow exception interrupt is always guaranteed, as follows:
The 80h limit leaves 64 bytes available for stack overflow processing. A worst case might be
occurs when the Stack Pointer is at 80h and a program executes an 8 word push; this generates a
stack overflow. If an NMI occurs at the same time, 3 additional words are pushed. The balance
Figure 4.13 PUSH a byte
before
after
SP
00
SP
MOV R0,#9876h
PUSH R0H
98
(empty)
(empty)
(empty)
(empty)
(empty)
2n + 6
existing data existing data
2n + 4
2n + 2
....
2n + 6
2n + 4
2n + 2
....