AP-578
2/21/97 12:57 PM 24329102.DOC
INTEL CONFIDENTIAL
(until publication date)
problem with this early hardware, Intel recommends
that FPU exception handlers always access port
0F0H before clearing the error condition from the
FPU.
3.3 Synchronization Required for
Use of FPU Exception Handlers
Concurrency or synchronization management
requires a check for exceptions before letting the
processor change a value just used by the FPU. It
is important to remember that almost any numeric
instruction can, under the wrong circumstances,
produce a numeric exception.
3.3.1 EXCEPTION SYNC HRONIZATION:
WHAT, WHY AND WHEN
Exception synchronization means that the
exception handler inspects and deals with the
exception in the context in which it occurred. If
concurrent execution is allowed, the state of the
processor when it recognizes the exception is often
not in the context in which it occurred. The
processor may have changed many of its internal
registers and be executing a totally different
program by the time the exception occurs. If the
exception handler cannot recapture the original
context, it cannot reliably determine the cause of
the exception or to recover successfully from the
exception. To handle this situation, the FPU has
special registers updated at the start of each
numeric instruction to describe the state of the
numeric program when the failed instruction was
attempted. This provides tools to help the exception
handler recapture the original context, but the
application code must also be written with
synchronization in mind. Overall, exception
synchronization must ensure that the FPU and
other relevant parts of the context are in a well
defined state when the handler is invoked after an
unmasked numeric exception occurs.
When the FPU signals an unmasked exception
condition, it is requesting help. The fact that the
exception was unmasked indicates that further
numeric program execution under the arithmetic
and programming rules of the FPU will probably
yield invalid results. Thus the exception must be
handled, and with proper synchronization, or the
program will not operate reliably.
For programmers in higher-level languages, all
required synchronization is automatically provided
by the appropriate compiler. However, for assembly
language programmers exception synchronization
remains the responsibility of the programmer. It is
not uncommon for a programmer to expect that
their numeric program will not cause numeric
exceptions after it has been tested and debugged,
but in a different system or numeric environment,
exceptions may occur regularly nonetheless. An
obvious example would be use of the program with
some numbers beyond the range for which it was
designed and tested. The example in Section 3.3.2
shows a more subtle way in which unexpected
exceptions can occur.
As described in Section 3.1.1, depending on
options determined by the software system
designer, the processor can perform one of two
possible courses of action when a numeric
exception occurs.
• The FPU can provide a default fix-up for
selected numeric exceptions. If the FPU
performs its default action for all exceptions,
then the need for exception synchronization is
not manifest. However, code is often ported to
contexts and operating systems for which it
was not originally designed. The example
below illustrates that it is safest to always
consider exception synchronization when
designing code that uses the FPU.
• Alternatively, a software exception handler can
be invoked to handle the exception. When a
numeric exception is unmasked and the
exception occurs, the FPU stops further
execution of the numeric instruction and
causes a branch to a software exception
handler. When an FPU exception handler will
be invoked, synchronization must always be
considered to assure reliable performance.
The following examples illustrate the need to
always consider exception synchronization when
writing numeric code, even when the code is initially
intended for execution with exceptions masked.
3.3.2 EXCEPTION SYNC HRONIZATION:
EXAMPLES
In the following examples, three instructions are
shown to load an integer, calculate its square root,
then increment the integer. The synchronous
execution of the FPU will allow both of these
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