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Intel 8253 - Mode 5 Hardware Triggered Strobe

Intel 8253
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8254
MODE 5: HARDWARE TRIGGERED STROBE
(RETRIGGERABLE)
OUT will initially be high. Counting is triggered by a
rising edge of GATE. When the initial count has ex-
pired, OUT will go low for one CLK pulse and then
go high again.
After writing the Control Word and initial count, the
counter will not be loaded until the CLK pulse after a
trigger. This CLK pulse does not decrement the
count, so for an initial count of N, OUT does not
strobe low until N
a
1 CLK pulses after a trigger.
A trigger results in the Counter being loaded with the
initial count on the next CLK pulse. The counting
sequence is retriggerable. OUT will not strobe low
for N
a
1 CLK pulses after any trigger. GATE has
no effect on OUT.
If a new count is written during counting, the current
counting sequence will not be affected. If a trigger
occurs after the new count is written but before the
current count expires, the Counter will be loaded
with the new count on the next CLK pulse and
counting will continue from there.
23116412
Figure 20. Mode 5
16

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