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Intel 8253 - Bus Configuration

Intel 8253
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4/17/98 7-3 External Bus
7.1.10 BUSW - Bus Width
The external XA bus may be configured to be 8 or 16 bits in width. The XA allows the bus width
to be programmed in 2 ways. In a system where instructions are initially fetched from on-chip
code memory, the user program can configure the external bus size (and many other aspects of
the bus) prior to the bus actually being used.
When the initial code fetches must be done using off-chip code memory, however, the XA must
know the bus width before the first off-chip code fetch can begin.
On some XA derivatives, the BUSW function may share a pin with some other function. In this
case, the level on the BUSW pin is latched as Reset is released and that selection is kept until the
next Reset. The secondary function on that pin will be active after Reset when the processor
begins executing code normally.
Unlike the
EA function, the bus width set by the BUSW pin at reset may be over-ridden by a
user program, making setting by use of the BUSW pin unnecessary in most systems. Settings in
the Bus Configuration Register allow changing the bus size under program control. This feature
is covered in more detail in the next section.
7.2 Bus Configuration
The standard XA external bus has a number of configuration options. In addition to the data bus
width selection discussed previously, the number of address lines used for external accesses is
programmable, as is the bus timing.
7.2.1 8-Bit and 16-Bit Data Bus Widths
The standard XA external bus allows both 8-bit and 16-bit bus widths. BUSW=0 selects an 8-bit
bus and BUSW=1 selects a 16-bit bus. On power-up, the XA defaults to the 16-bit bus (due to an
on-chip weak pull-up on BUSW). The bus width is determined by the value of the BUSW pin as
Reset is released, unless a user program overrides that setting by writing to the Bus
Configuration Register (BCR), shown in Figure7.1.

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