Intel 8253 - Floating-Point Unit; Bus Cycles

80C187
Table 10. Bus Cycles Definition
NPS1 NPS2 CMD0 CMD1 NPRD NPWR Bus Cycle Type
x 0 x x x x 80C187 Not Selected
1 x x x x x 80C187 Not Selected
0 1 0 0 1 0 Opcode Write to 80C187
0 1 0 0 0 1 CW or SW Read from 80C187
0 1 1 0 0 1 Read Data from 80C187
0 1 1 0 1 0 Write Data to 80C187
0 1 0 1 1 0 Write Exception Pointers
0 1 0 1 0 1 Reserved
0 1 1 1 0 1 Read Opcode Status
0 1 1 1 1 0 Reserved
DATA INTERFACE AND CONTROL UNIT
The data interface and control unit latches the data
and, subject to BCL control, directs the data to the
FIFO or the instruction decoder. The instruction de-
coder decodes the ESC instructions sent to it by the
CPU and generates controls that direct the data flow
in the FIFO. It also triggers the microinstruction se-
quencer that controls execution of each instruction.
If the ESC instruction is FINIT, FCLEX, FSTSW,
FSTSW AX, FSTCW, FSETPM, or FRSTPM, the
control executes it independently of the FPU and the
sequencer. The data interface and control unit is the
one that generates the BUSY, PEREQ, and ERROR
signals that synchronize 80C187 activities with the
CPU.
FLOATING-POINT UNIT
The FPU executes all instructions that involve the
register stack, including arithmetic, logical, transcen-
dental, constant, and data transfer instructions. The
data path in the FPU is 84 bits wide (68 significant
bits, 15 exponent bits, and a sign bit) which allows
internal operand transfers to be performed at very
high speeds.
Bus Cycles
The pins NPS1, NPS2, CMD0, CMD1, NPRD and
NPWR
identify bus cycles for the NPX. Table 10 de-
fines the types of 80C187 bus cycles.
80C187 ADDRESSING
The NPS1
, NPS2, CMD0, and CMD1 signals allow
the NPX to identify which bus cycles are intended for
the NPX. The NPX responds to I/O cycles when the
I/O address is 00F8H, 00FAH, 00FCH, or 00FEH.
The correspondence betwen I/O addresses and
control signals is defined by Table 11. To guarantee
correct operation of the NPX, programs must not
perform any I/O operations to these reserved port
addresses.
Table 11. I/O Address Decoding
I/O Address
80C187 Select and Command Inputs
(Hexadecimal) NPS2 NPS1 CMD1 CMD0
00F8 1 0 0 0
00FA 1 0 0 1
00FC 1 0 1 0
00FE 1 0 1 1
17