Intel387
TM
SX MATH COPROCESSOR
Table 3-2. Condition Code Interpretation after FPREM and FPREM1 Instructions
Condition Code
Interpretation after FPREM and FPREM1
C2 C3 C1 C0
Incomplete Reduction:
1 X X X further interation required
for complete reduction
Q1 Q0 Q2 Q MOD8
000 0
010 1
Complete Reduction:
0
100 2
C0, C3, C1 contain three least
110 3
significant bits of quotient
001 4
011 5
101 6
111 7
Table 3-3. Condition Code Resulting from Comparison
Order C3 C2 C0
TOP
l
Operand 0 0 0
TOP
k
Operand 0 0 1
TOP
e
Operand 1 0 0
Unordered 1 1 1
Table 3-4. Condition Code Defining Operand Class
C3 C2 C1 C0 Value at TOP
0000
a
Unsupported
0001
a
NaN
0010
b
Unsupported
0011
b
NaN
0100
a
Normal
0101
a
Infinity
0110
b
Normal
0111
b
Infinity
1000
a
0
1001
a
Empty
1010
b
0
1011
b
Empty
1100
a
Denormal
1110
b
Denormal
Table 3-5 Mapping Condition Codes to Intel386
TM
CPU Flag Bits
240225–4
14
14