3/24/97 2-18 Architectural Overview
2.6 External Bus
Most XA derivatives have the capability of accessing external code and/or data memory through
the use of an external bus. The external bus provides address information to external devices, and
initiates code read, data read, or data write strobes. The standard XA external bus is designed to
provide flexibility, simplicity of connection, and optimization for external code fetches.
As described in section 4.4.4, the initial external bus width is hardware settable, and the XA
determines its value (8 or 16 bits) during the reset sequence.
2.6.1 External Bus Signals
The standard XA external bus supports 8 or 16-bit data transfers and up to 24 address lines. The
precise number of address lines varies by derivative. The standard control signals and their
functions for the external bus are as follows:
2.6.2 Bus Configuration
The standard XA bus is user configurable in several ways. First, the bus size may be configured
to either 8 bits or 16 bits. This may be configured by the logic level on a pin at reset, or under
firmware control (if code is initially executed from on-chip code memory) prior to any actual
external bus operations. As on the 80C51, the
EA pin determines whether or not on-chip code
memory is used for initial code fetches.
Signal name Function
ALE Address Latch Enable. This signal directs an external address
latch to store a portion of the address for the next bus operation.
This may be a data address or a code address.
PSEN Program Store Enable. Indicates that the XA is reading code
information over the bus. Typically connected to the Output
Enable pin of external EPROMs.
RD Read. The external data read strobe. Typically connected to the
RD pin of external peripheral devices.
WRL Write. The low byte write strobe for external data. Typically
connected to the
WR pin of external peripheral devices. For an 8-
bit data bus, this is the only write strobe. For a 16-bit data bus,
this strobe applies only to the lower data byte.
WRH Write High. This is the upper byte write strobe for external data
when using a 16-bit data bus.
WAIT Wait. Allows slowing down any type external bus cycle. When
asserted during a bus operation, that operation waits for this
signal to be de-asserted before it is completed.
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