XA User Guide 2-9 3/24/97
When the service routine completes, it returns to the interrupted code by executing the RETI
(return from interrupt) instruction. This instruction loads first the PSW and then the Program
Counter from the stack, resuming operation at the point of interruption. If more than the PC and
PSW are used by the service routine, it is up to that routine to save and restore those registers or
other portions of the machine state, normally by using the stack, and often by switching register
banks.
Reset
Power up reset and any other external reset of the XA is accomplished via an active low reset
pin. A simple resistor and capacitor reset circuit is typically used to provide the power-on reset
pulse. the reset pin is a Schmitt trigger input, in order to prevent noise on the reset pin from
causing spurious or incomplete resets.
The XA may be reset under program control by executing the RESET instruction. This
instruction has the effect of resetting the processor as if an external reset occurred, except that
some hardware features that are latched following a hardware reset (such as the state of the EA
pin and bus width programming) are not re-latched by a software reset. This distinction is
necessary because external circuitry driving those inputs cannot determine that a reset is in
progress.
Some XA derivatives also have a hardware watchdog timer peripheral that will trigger an
equivalent chip reset if it is allowed to time out.
Oscillator and Power Saving Modes
XA derivatives have an on-chip oscillator that may be used with crystals or ceramic resonators to
provide a clock source for the processor.
The XA supports two power saving modes of operation: Idle mode and Power Down mode.
Either mode is activated by setting a bit in the Power Control (PCON) register. The Idle mode
shuts down all processor functions, but leaves most of the on-chip peripherals and the external
interrupts functioning. The oscillator continues to run. An interrupt from any operating source
will cause the XA to resume operation where it left off.
The Power Down mode goes one step further and shuts down everything, including the on-chip
oscillator. This reduces power consumption to a tiny amount of CMOS leakage plus whatever
loads are placed on chip pins. Resuming operation from the power down mode requires the
oscillator to be restarted, which takes about 10 milliseconds. Power down mode can be
terminated either by resetting the XA or by asserting one of the external interrupts, if one was
left enabled when power down mode was entered. In Power Down mode, data in on-board RAM
is retained. Further power savings may be made by reducing Vdd in Power Down mode; see the
device data sheet for details.
Stack
The processor stack provides a means to store interrupt and subroutine return addresses, as well
as temporary data. The XA includes 2 stack pointers, the System Stack Pointer (SSP) and the
User Stack Pointer (USP), which correspond to 2 different stacks: the system stack and the user
stack. See Figure 2.7. The system stack always resides in the first data memory segment,
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