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Intel 8253 - Page 353

Intel 8253
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XA User Guide 2-23 3/24/97
• Stack. One area where a functional change could not be avoided is in the use of the processor
stack. Due to the fact that the XA supports 16-bit operations in memory, it was necessary to
change the direction of stack growth to downward –the standard for 16-bit processors– in order
to match stack usage with efficient access of 16-bit variables in memory. This is an important
consideration for support of high-level language compilers such as C.
• Pin-for-pin compatibility. XA derivatives are not intended to be exactly pin-compatible with
other 80C51 derivatives that have similar features. Many on-chip XA peripherals, for example,
have improved capabilities, and maintaining pin-for-pin compatibility would limit access to these
capabilities. In general, peripherals have been made upward compatible with the original 80C51
devices, and most enhancements are added transparently. In these cases, 80C51 code will operate
correctly on the 80C51 functional subset.
• Bus Interface. The external bus on the XA is an example of a trade-off between 80C51
compatibility and performance. In order to provide more flexibility and maximum performance,
the 80C51 bus had to be changed somewhat. The differences are described in detail in the section
on the external bus.

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