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Intel 8253 - Page 410

Intel 8253
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XA User Guide 6-10 4/17/98
Glossary of mnemonics, notations used
General:
offset8 An 8-bit signed offset (immediate data in the instruction) that is added to a register to
produce an absolute address.
offset16 A 16-bit signed offset (immediate data in the instruction) that is added to a register to
produce an absolute address.
direct An 11-bit immediate address contained in the instruction.
#data4 4 bits of immediate data contained in the instruction. (range +7 to -8 for
signed immediate data and 0-15 for shifts)
#data5 5 bits of immediate data contained in the instruction. (0-31 for shifts)
#data8 8 bits of immediate data contained in the instruction. (+127 to -128)
#data16 16 bits of immediate data contained in the instruction. (+32,767 to -32,768)
bit The 10-bit address of an addressable bit.
rel8 An 8-bit relative displacement for branches. (+254 to -256)
rel16 An 16-bit relative displacement for branches.(+65,534 to -65,536)
addr16 A 16-bit absolute branch address within a 64K code page.
addr24 A 24-bit absolute branch address, able to access the entire XA address space.
SP The current Stack Pointer (User or System) depending on the operation mode.
USP The User Stack Pointer.
SSP The System Stack Pointer
C Carry flag from the PSW.
AC Auxiliary Carry flag from the PSW.
V Overflow flag from the PSW.
N Negative flag from the PSW.
Z Zero flag from the PSW.
DS Data segment register. Holds the upper byte of the 24-bit data address space of the XA.
Used mainly for local data segments.
ES Extra segment register. Holds the upper byte of the 24-bit data address space of the XA.
Used mainly for addressing remote data structures.
direct Uses the current DS for data memory for the upper byte of the 24-bit address or none
(uses only the low 16-bit address) for accessing the special functions register (SFR)
space. The interpretation should be as below:
if (data range)
then (direct = (DS:direct)
if (sfr range)
then (direct) = (sfr)
Operation encoding fields:
SZ Data Size. This field encodes whether the operation is byte, word or double-word.
IND This field flags indirect operation in some instructions.
H/L This field selects whether PUSH and POP Rlist use the upper or lower half of the
available registers.
dddd Destination register field, specifies one of 16 registers in the register file.
ddd Destination register field for indirect references, specifies one of 8 pointer registers in
the register file.
ssss Source register field, specifies one of 16 registers in the register file.
sss Source register field for indirect references, specifies one of 8 pointer registers in the
register file.

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