Intel 8253 - Page 443

4/17/98 6-43 Addressing Modes and Data Types
ADDC [Rd+offset8], #data16
Bytes: 5
Clocks: 6
Operation: ((WS:Rd)+offset8) <-- ((WS:Rd)+offset8) + #data16 + (C)
Encoding:
byte 3: offset8
byte 4: upper 8 bits of #data16
byte 4: lower 8 bits of #data16
ADDC [Rd+offset16], #data8
Bytes: 5
Clocks: 6
Operation: ((WS:Rd)+offset16) <-- ((WS:Rd)+offset16) + #data8 + (C)
Encoding:
byte 3: upper 8 bits of offset16
byte 4: lower 8 bits of offset16
byte 5: #data8
ADDC [Rd+offset16], #data16
Bytes: 6
Clocks: 6
Operation: ((WS:Rd)+offset16) <-- ((WS:Rd)+offset16) + #data16 + (C)
Encoding:
byte 3: upper 8 bits of offset16
byte 4: lower 8 bits of offset16
byte 5: upper 8 bits of #data16
byte 6: lower 8 bits of #data16
ADDC direct, #data8
Bytes: 4
Clocks: 4
Operation: (direct) <-- (direct) + #data8 + (C)
Encoding:
byte 3: lower 8 bits of direct
byte 4: #data8
1 0 0 1 1 1 0 0 0 d d d 0 0 0 1
1 0 0 1 0 1 0 1 0 d d d 0 0 0 1
1 0 0 1 1 1 0 1 0 d d d 0 0 0 1
1 0 0 1 0 1 1 0 0 direct: 3 bits 0 0 0 1