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Intel 8253 - Page 521

Intel 8253
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4/17/98 6-121 Addressing Modes and Data Types
MOVC Move Code to A (DPTR)
Syntax: MOVC A, [A+DPTR]
Operation: PC <- PC+2
(A) <-- code memory (PC.23-16:(A) + (DPTR))
Description: The byte located at the code memory address formed by the sum of A and the DPTR
is copied to the A register. The A and DPTR registers are pre-defined registers used for 80C51
compatibility. This instruction is included for 80C51 compatibility. See Chapter 9 for details of
80C51 compatibility features.
Size: Byte-Byte
Flags Updated: N, Z
Bytes: 2
Clocks: 6
Encoding:
.
1 0 0 1 0 0 0 0 0 1 0 0 1 1 1 0

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