Intel 8253 - Page 527

4/17/98 6-127 Addressing Modes and Data Types
MUL.w Rd, Rs
(signed 16 bits * 16 bits --> 32 bits)
Bytes: 2
Clocks: 12
Operation: (Rd+1)<-- Most significant word of (Rd) * (Rs) (signed multiply)
(Rd) <-- Least significant word of (Rd) * (Rs)
Encoding:
MUL.w Rd, #data16
(signed 16 bits * 16 bits --> 32 bits)
Bytes: 4
Clocks: 12
Operation: (Rd+1)<-- Most significant word of (Rd) * #data16 (signed multiply)
(Rd) <-- Least significant word of (Rd) * #data16
Encoding:
byte 3: upper 8 bits of #data16
byte 4: lower 8 bits of #data16
MULU.b Rd, Rs
(unsigned 8 bits * 8 bits --> 16 bits)
Bytes: 2
Clocks: 12
Operation: (RdH) <-- Most significant byte of (RdL) * (Rs) (unsigned multiply)
(RdL) <-- Least significant byte of (RdL) * (Rs)
Encoding:
1 1 1 0 0 1 1 0 d d d d s s s s
1 1 1 0 1 0 0 1 d d d d 1 0 0 0
1 1 1 0 0 0 0 0 d d d d s s s s