Intel 8253 - Page 534

XA User Guide 6-134 4/17/98
OR Rd, [Rs+]
Bytes: 2
Clocks: 5
Operation: (Rd) <-- (Rd) + ((WS:Rs))
(Rs) <-- (Rs) + 1 (byte operation) or 2 (word operation)
Encoding:
OR [Rd+], Rs
Bytes: 2
Clocks: 5
Operation: ((WS:Rd)) <-- ((WS:Rd)) + (Rs)
(Rd) <-- (Rd) + 1 (byte operation) or 2 (word operation)
Encoding:
OR direct, Rs
Bytes: 3
Clocks: 4
Operation: (direct) <-- (direct) + (Rs)
Encoding:
byte 3: lower 8 bits of direct
OR Rd, direct
Bytes: 3
Clocks: 4
Operation: (Rd) <-- (Rd) + (direct)
Encoding:
byte 3: lower 8 bits of direct
0 1 1 0 SZ 0 1 1 d d d d 0 s s s
0 1 1 0 SZ 0 1 1 s s s s 1 d d d
0 1 1 0 SZ 1 1 0 s s s s 1 direct: 3 bits
0 1 1 0 SZ 1 1 0 d d d d 0 direct: 3 bits