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Intel 8253 - Page 568

Intel 8253
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XA User Guide 6-168 4/17/98
TRAP Software Trap
Syntax: TRAP #data4
Operation: (PC) <-- (PC) + 2
(SSP) <-- (SSP) - 6
((SSP)) <-- (PC)
((SSP)) <-- (PSW)
(PSW) <-- code memory (trap vector (#data4))
(PC.
15-0) <-- code memory (trap vector (#data4))
(PC.
23-16) <-- 0; (PC.0) <-- 0
Description: Causes the specified software trap. The invoked routine is determined by branching
to the specified vector table entry point. The RETI, return from interrupt, instruction is used to
resume execution after the trap routine has been completed. A trap acts like an immediate interrupt,
using a vector to call one of several pieces of code that will be executed in system mode. This may
be used to obtain system services for application code, such as altering the data segment register.
This is described in more detail in the section on interrupts and exceptions.
Note: The address of the exception handling routine must be word aligned as the PC is forced to
an even address before vectoring to the service routine.
Size: None
Flags Updated: none
Bytes: 2
Clocks: 23/19 (PZ)
Encoding:
1 1 0 1 0 1 1 0
0 0 1 1 #data4

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