Intel Pentium 4 User Manual

Introduction
R
6 Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide
9.1.3
Primary IDE Connector Requirements................................................ 137
9.1.4 Secondary IDE Connector Requirements ........................................... 138
9.2 Communication and Networking Riser (CNR).................................................... 139
9.2.1 CNR Placement .................................................................................. 139
9.3 Intel
®
AC’97 ........................................................................................................ 140
9.3.1 AC’97 Audio Codec Detect Circuit and Configuration Options ........... 144
9.3.2 Valid Codec Configurations................................................................. 148
9.4 USB Guidelines .................................................................................................. 148
9.5 IOAPIC Design Recommendations .................................................................... 149
9.6 SMBus/SMLink Interface .................................................................................... 150
9.6.1 SMBus Architecture and Design Considerations ................................ 151
9.6.1.1 SMBus Design Considerations .......................................... 151
9.6.1.2 General Design Issues / Notes.......................................... 151
9.6.1.3 The Unified VCC_ Suspend Architecture .......................... 152
9.6.1.4 The Unified VCC_Core Architecture.................................. 152
9.6.1.5 Mixed Architecture ............................................................. 153
9.7 PCI...................................................................................................................... 153
9.7.1 PCI Routing – Four-Layer Motherboard.............................................. 154
9.8 RTC .................................................................................................................... 157
9.8.1 RTC Crystal......................................................................................... 157
9.8.2 External Capacitors............................................................................. 158
9.8.3 RTC Layout Considerations ................................................................ 158
9.8.4 RTC External Battery Connection ....................................................... 158
9.8.5 RTC External RTCRST Circuit............................................................ 159
9.8.6 RTC Routing Guidelines ..................................................................... 160
9.8.7 VBIAS DC Voltage and Noise Measurements .................................... 160
9.8.8 Power-Well Isolation Control............................................................... 161
9.8.9 Power Supply PS_ON Consideration.................................................. 162
9.9 LAN Layout Guidelines ....................................................................................... 162
9.9.1 Intel
®
ICH2 – LAN Interconnect Guidelines......................................... 164
9.9.1.1 Bus Topologies .................................................................. 164
9.9.1.2 Point-to-Point Interconnect ................................................ 164
9.9.1.3 LOM/CNR Interconnect ..................................................... 165
9.9.1.4 Signal Routing and Layout................................................. 166
9.9.1.5 Crosstalk Considerations................................................... 166
9.9.1.6 Impedances ....................................................................... 166
9.9.1.7 Line Termination................................................................ 167
9.9.2 General LAN Routing Guidelines and Considerations ........................ 167
9.9.2.1 General Trace Routing Considerations ............................. 167
9.9.2.1.1 Trace Geometry and Length.............................. 168
9.9.2.1.2 Signal Isolation .................................................. 168
9.9.2.2 Power and Ground Connections........................................ 169
9.9.2.2.1 General Power and Ground Plane
Considerations................................................... 169
9.9.2.3 Common Physical Layout Issues....................................... 170
9.9.3 Intel
®
82562EH Home/PNA* Guidelines ............................................. 172
9.9.3.1 Power and Ground Connections........................................ 172
9.9.3.2 Guidelines for Intel
®
82562EH Component Placement ..... 172
9.9.3.3 Crystals and Oscillators ..................................................... 172
9.9.3.4 Phoneline HPNA Termination............................................ 173
9.9.3.5 Critical Dimensions............................................................ 174
9.9.3.5.1 Distance from Magnetics Module to Line RJ11 . 174

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB