Lattice Semiconductor CertusPro-NX Usage Guide

CertusPro-NX SerDes/PCS Usage Guide
Preliminary Technical Note
FPGA-TN-02245-0.81 © 2020-2021 Lattice Semiconductor 131
All rights reserved. CONFIDENTIAL
Field
Name
Access
Width
Reset
Description
1’b0 – normal operation.
[0]
plesio_lpbk
RW
1
1’b0
Enables the plesiochronous loopback mode which forces
the PCS to loopback data from Rx back to Tx after the PCIe
elastic buffer function. It is equivalent to PCIe slave
loopback except that it is forced by a register instead of
controlled by the PCIe MAC layer.
1’b1 – enabling the plesiochronous loopback mode.
1’b0 – normal operation.
Table A. 27. CDR PLL Manual Control [reg79]
Field
Name
Access
Width
Reset
Description
[7:3]
reserved
RSVD
5
5’h00
—
[2]
fine_grain
RW
1
1’b0
Forces the CDR PLL state machine to fine grain state.
1’b1 – forces the CDR PLL state machine to fine grain
state.
1’b0 – normal operation.
[1]
coarse_grain
RW
1
1’b0
Forces the CDR PLL state machine to coarse grain mode. In
this state, the CDR PLL performs a coarse grain lock on
received data enabling to adjust its clock up to 5000 ppm.
1’b1 – forces the CDR PLL state machine to coarse grain
state.
1’b0 – normal operation.
[0]
freq_lock
RW
1
1’b0
Forces the CDR PLL state machine to frequency lock state.
In this state, the CDR PLL does not lock on received data
but on reference clock.
1’b1 – forces the CDR PLL state machine to frequency
lock state.
1’b0 – normal operation.
Table A. 28. PMA Status [reg7f]
Field
Name
Access
Width
Reset
Description
[7:6]
reserved
RSVD
2
2’b00
—
[5]
rxclkstable
RO
1
1’b0
CDR PLL status.
1’b1 – locked.
1’b0 – loss of lock.
[4]
txclkstable
RO
1
1’b0
Tx PLL status.
1’b1 – locked.
1’b0 – loss of lock.
[3]
cdrdiagout
RO
1
1’b0
CDR PLL lock status.
1’b1 – locked on Rx data.
1’b0 – not locked on Rx data.
[2]
trandet
RO
1
1’b0
Rx activity detection.
1’b1 – Rx activity detected.
1’b0 – loss of signal.
[1]
cdrpllrstb
RO
1
1’b0
CDR PLL reset status.
1’b1 – CDR PLL is under reset.
1’b0 – reset is released.
[0]
txpllrstb
RO
1
1’b0
Tx PLL reset status.
1’b1 – Tx PLL is under reset.
1’b0 – reset is released.

Lattice Semiconductor CertusPro-NX Specifications

General

Brand	Lattice Semiconductor
Model	CertusPro-NX
Category	Computer Hardware
Language	English