Lattice Semiconductor CertusPro-NX Usage Guide

CertusPro-NX SerDes/PCS Usage Guide
Preliminary Technical Note
FPGA-TN-02245-0.81 © 2020-2021 Lattice Semiconductor 139
All rights reserved. CONFIDENTIAL
Field
Name
Access
Width
Reset
Description
is not ignored during alignment pattern matching.
Table A. 46. Word Alignment Pattern Mask Code MSB [reg39]
Field
Name
Access
Width
Reset
Description
[7:4]
reserved
RSVD
4
—
—
[3:2]
wa_mask_code[19:18]
RW
2
2’h0
Word Align Mask Mode. Specifies the 20-bit word
alignment pattern. In 10-bit width mode, only bits 9 to 0
are applied.
1’b1 – the corresponding bit of word alignment pattern
is ignored during alignment pattern matching.
1’b0 – the corresponding bit of word alignment pattern
is not ignored during alignment pattern matching.
[1:0]
wa_mask_code [9: 8]
RW
2
2’h0
Word Align Mask Mode. Specifies the 20-bit word
alignment pattern. In 10-bit width mode, only bits 9 to 0
are applied.
1’b1 – The corresponding bit of word alignment pattern
is ignored during alignment pattern matching.
1’b0 – The corresponding bit of word alignment pattern
is not ignored during alignment pattern matching.
Table A. 47. Sync_Det FSM Configuration 0 [reg3a]
Field
Name
Access
Width
Reset
Description
[7:0]
num_cal_sync
RW
8
8’d3
Specifies the number of valid synchronization code groups
or ordered sets that “sync_det” FSM must receive to
achieve synchronization state.
Table A. 48. Sync_Det FSM Configuration 1 [reg3b]
Field
Name
Access
Width
Reset
Description
[7:6]
reserved
RSVD
2
—
—
[5:0]
num_bad_code
RW
6
6’d4
Specifies the number of bad code groups received by
“sync_det” FSM to conclude the loss of synchronization.
Table A. 49. Sync_Det FSM Configuration 2 [reg3c]
Field
Name
Access
Width
Reset
Description
[7:0]
num_good_code
RW
8
8’d4
Specifies the continuous good code groups received by
“sync_det” FSM to reduce the error count by one.
Table A. 50. Sync_Det FSM Configuration 3 [reg3d]
Field
Name
Access
Width
Reset
Description
[7:5]
reserved
RSVD
3
—
—
4
set_sync_ptn_dis
RW
1
1’b0
Secondary Sync Detect Pattern. Specifies the secondary
detect pattern is enabled or disabled.
1’b1 – disable secondary sync_det pattern and do not
use it for matching.
1’b0 – use the secondary sync_det pattern for
matching.
3
sync_ptn_10b
RW
1
1’b1
Sync Detect Pattern. Specifies the pattern code.
1’b1 – the sync_det pattern is 10b code.
1’b0 – the sync_det pattern is 8b code.
2
sync_ptn_align
RW
1
1’b0
Pattern Alignment check. Specifies the pattern alignment

Lattice Semiconductor CertusPro-NX Specifications

General

Brand	Lattice Semiconductor
Model	CertusPro-NX
Category	Computer Hardware
Language	English