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Lattice Semiconductor CertusPro-NX Usage Guide

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CertusPro-NX SerDes/PCS Usage Guide
Preliminary Technical Note
74 © 2020-2021 Lattice Semiconductor FPGA-TN-02245-0.81
All rights reserved. CONFIDENTIAL
Table 7.2. 64B/66B PCS Channel Clock
Clock
Direction
Description
PMA Interface (Hardened Connection)
tx_pcs_clk
N/A
This parallel data clock is generated by PMA Tx macro and used by MPCS to drive Tx
data bus. The source of this clock is Tx PLL.
rx_pcs_clk
N/A
This parallel data clock is generated by PMA Rx macro and used by MPCS to receive
data from Rx data bus. The source of this clock is the recovered clock from Rx CDR.
Fabric Interface
tx_out_clk
Output
This clock is directly connected to FPGA global buffer, and thus can drive FPGA clock
tree. The source of this clock is selected by MPCS, depending on application cases.
This clock can be the divided-by-two version of its source clock.
rx_out_clk
Output
This clock is directly connected to FPGA global buffer, and thus can drive FPGA clock
tree. The source of this clock is selected by MPCS, depending on application cases
This clock can be the divided-by-two version of its source clock.
tx_usr_clk
Input
This clock is a node of fabric clock tree. The data sent by user logic to MPCS is
synchronous to this clock.
rx_usr_clk
Input
This clock is a node of fabric clock tree. The data received by user logic from MPCS is
synchronous to this clock.
Channel Internal Clock
tx_pcs_divclk
N/A
This clock is divided-by-four version of tx_pcs_clk. It is used to drive most part of the
64B/66B PCS Tx path sub-modules.
This clock and tx_pcs_clk are positive edge aligned, with as little skew as possible
between them, so that output data from this clock domain can be sampled by
tx_pcs_clk directly.
rx_pcs_divclk
N/A
This clock is divided-by-four version of rx_pcs_clk. It is used to drive most part of the
64B/66B PCS Rx path sub-modules.
This clock and rx_pcs_clk are positive edge aligned, with as little skew as possible
between them, so that output data from rx_pcs_clk clock domain can be sampled by
rx_pcs_divclk directly.
tx_pcs_bufclk
N/A
This clock is divided-by-two version of tx_pcs_clk.
rx_pcs_bufclk
N/A
This clock is divided-by-two version of rx_pcs_clk.

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Lattice Semiconductor CertusPro-NX Specifications

General IconGeneral
BrandLattice Semiconductor
ModelCertusPro-NX
CategoryComputer Hardware
LanguageEnglish