Lattice Semiconductor CertusPro-NX Usage Guide

CertusPro-NX SerDes/PCS Usage Guide
Preliminary Technical Note
FPGA-TN-02245-0.81 © 2020-2021 Lattice Semiconductor 111
All rights reserved. CONFIDENTIAL
Protocol Name
Descriptions
QSGMII
QSGMII
PCIE
PCI Express Hard IP mode (not for user implementation)
PCIE-PCS
PCI Express PIPE mode
SGMII
SGMII
SLVS_EC
SLVS-EC
XAUI
XAUI
G8B10B
Generic 8B/10B
PMA_ONLY
PMA Only
Attribute Summary
The configurable attributes of the MPCS foundational IP are listed in Table 14.2 and described in Table 14.3.
Table 14.2. Attributes Summary
Attribute
Selectable Values
Default
Dependency on Other Attributes
General
Protocol
“1KBASEX”,
“10GE”,
“COAXPRESS”,
“DP”,
“EDP”,
“QSGMII”,
“SGMII”,
“SLVS_EC”,
“PCIE”,
“PCIE-PCS”,
“XAUI”
“1KBASEX”
Active if Bypass PCS == “Unchecked”
Bypass PCS
“Checked”, “Unchecked”
“Unchecked”
—
Override TX PCS Mode
“Checked”, “Unchecked”
“Unchecked”
—
Override RX PCS Mode
“Checked”, “Unchecked”
“Unchecked”
—
Number of Lanes
1, 2, 4, 6, 8
2
If Protocol is “10GE” or “PCIE-PCS”,
the options are [1, 2, 4].
Otherwise, the options are [1, 2, 4, 6,
8].
Active if one of these conditions is
true:
Protocol != “RXAUI”
Protocol != “PCIE”
Bypass PCS == “Checked”
Lane ID
“AUTO”, 0, 1, 2, 3, 4, 5, 6, 7
AUTO
If Protocol is “10GE”, the options are
[2, 3, 6, 7], (will also depend on the
Number of Lanes)
else If Prototocol is “PCIE” or “PCIE-
PCS”, Lane ID is set to “AUTO”
else the options are [“AUTO”, 1, 2, 3,
4, 5, 6, 7]
Active if one of these conditions is
true:
Protocol != “PCIE”/”PCIE-PCS”
Protocol != “10GE” and Number of
Lanes != 4
Group Name
N/A
N/A
Automatically take the component

Lattice Semiconductor CertusPro-NX Specifications

General

Brand	Lattice Semiconductor
Model	CertusPro-NX
Category	Computer Hardware
Language	English