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Lattice Semiconductor CertusPro-NX Usage Guide

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CertusPro-NX SerDes/PCS Usage Guide
Preliminary Technical Note
92 © 2020-2021 Lattice Semiconductor FPGA-TN-02245-0.81
All rights reserved. CONFIDENTIAL
Rx Equalization
CertusPro-NX device implements programmable single pole-zero Continuous Timer Linear Equalizer (CTLE) at the
receiver side, followed by Decision Feedback Equalization (DFE) and circuitry to support adaptation of the CTLE and
DFE. Figure 8.6 shows the block diagram of receive equalizer. CTLE comprises an active high pass filter that has the
effect of amplifying higher frequency components that have been more severely attenuated by the interconnection, or
attenuating the lower frequency components to a greater degree than the higher frequency components. DFE
comprises samplers offset by a programmable voltage value and a decision selection circuit that has the effect of
varying the sample threshold voltage based on the sampled data stream.
The CTLE and DFE can be tuned to compensate for more severe inter-symbol interference (ISI) than either circuit
performs alone.
CTLE
A
S
DFE
Figure 8.6. Receive Equalizer Block Diagram
The CTLE can be considered as a cascade of two frequency dependent equalizers. One primarily controls low frequency
attenuation and the other primarily controls the boost at high frequency. The DFE circuit adjusts the decision threshold
of the present bit by the resolved value of the prior bit. If the prior data is a 0, then the low threshold is chosen. If the
prior data is 1, then the high threshold is chosen.
It is important to note that CTLE has potential variation over process temperature and voltage. Hence, it is
recommended to use the adaptive scheme directly, other than to configure CTLE and DFE modules manually.

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Lattice Semiconductor CertusPro-NX Specifications

General IconGeneral
BrandLattice Semiconductor
ModelCertusPro-NX
CategoryComputer Hardware
LanguageEnglish