Lattice Semiconductor CertusPro-NX Usage Guide

CertusPro-NX SerDes/PCS Usage Guide
Preliminary Technical Note
FPGA-TN-02245-0.81 © 2020-2021 Lattice Semiconductor 39
All rights reserved. CONFIDENTIAL
Port Name
I/O
Width
Description
the PMA control logic which now controls the PMA hard macro.
The PMA hard macro is thus disconnected from the PMA
control logic:
This signal is used for two purposes:
Select the multiplexer between ACJTAG controller and
functional logic at the PMA interface directly.
Put out of reset the ACJTAG controller.
This signal is used as reset input for the embedded ACJTAG
controller of the PMA.
acjtag_enable_i
In
1
This signal configures the PMA in ACTAG test mode. By default,
it resets the Tx and Rx driver and receiver followed by loading
the driver and receiver with default settings. The PMA receiver
is by default in DC test mode and the transmitter is driving 0.
acjtag_acmode_i
In
1
When acjtag_enable_i == 1’b1, this signal selects either AC
mode (1’b1) or DC mode (1’b0).
acjtag_drive1_i
In
1
When acjtag_enable_i == 1’b1, this signal selects the differential
value the transmitter drives.
acjtag_highz_i
In
1
When acjtag_mode_i == 1’b1, assertion of this signal puts the
PMA driver in high impedance.
acjtagpout_i
In
1
ACJTAG Output Data.
acjtagnout_i
In
1
ACJTAG Output Data.
Note:
For multiple ports, [n] indicates lane/channel number.
Data Bus Sharing and Mapping
Table 5.12 defines the detailed usage for different bits of MPCS/EPCS data bus.
Table 5.12. Data Bus Sharing and Mapping
MPCS Module Port
MPCS Mode
Protocol != “10GE”
MPCS Mode
Protocol == “10GE”
EPCS Mode
Tx Path
mpcs_tx_ch_din_i[39:0]/
epcs_txdata_i[39:0]
tx_data[39:0]
4-byte output data
bit[39:30]: byte_3
bit[39]: cordisp bit or data
bit[9] when being used in 10b
mode.
bit[38]: control character when
being used in 8B/10B mode; or
data bit[8] when being used in
10b mode.
bit[37:30]: data bit[7:0]
bit[29:20]: byte_2
bit[19:10]: byte_1
bit[9:0]: byte_0
tx_data_64b[39:0]
Input data.
40-bit input data.
mpcs_tx_ch_din_i[43:40]/
epcs_txdata_i[43:40]
tx_frcdisp[3:0]
1: use “force running disparity”
mode; in this mode, the running
disparity is indicated by
“tx_dispval” signal.
0: do not use “force running
disparity” mode.
tx_data_64b[43:40]
Input data.
—
mpcs_tx_ch_din_i[47:44]/
epcs_txdata_i[47:44]
tx_dispval[3:0]
In “force running disparity” mode,
tx_data_64b[47:44]
Input data.
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Lattice Semiconductor CertusPro-NX Specifications

General

Brand	Lattice Semiconductor
Model	CertusPro-NX
Category	Computer Hardware
Language	English