CertusPro-NX SerDes/PCS Usage Guide
Preliminary Technical Note
FPGA-TN-02245-0.81 © 2020-2021 Lattice Semiconductor 133
All rights reserved. CONFIDENTIAL
Sync_Det Pattern Mask Code MSB.
Maximum Lane-to-lane Skew.
Primary Lane Alignment Pattern Byte 0.
Primary Lane Alignment Pattern Byte 1.
Primary Lane Alignment Pattern Byte 2.
Primary Lane Alignment Pattern Byte 3.
Primary Lane Alignment Pattern MSB.
Secondary Lane Alignment Pattern Byte 0.
Secondary Lane Alignment Pattern Byte 1.
Secondary Lane Alignment Pattern Byte 2.
Secondary Lane Alignment Pattern Byte 3.
Secondary Lane Alignment Pattern MSB.
Lane Alignment Pattern Mask Code.
Clock Frequency Compensation Control.
SKIP Pattern Insertion/Deletion Control.
Elastic FIFO High Water Line.
Elastic FIFO Low Water Line.
Primary SKIP Pattern Byte 0.
Primary SKIP Pattern Byte 1.
Primary SKIP Pattern Byte 2.
Primary SKIP Pattern Byte 3.
Primary SKIP Pattern Byte MSB.
Secondary SKIP Pattern Byte 0.
Secondary SKIP Pattern Byte 1.
Secondary SKIP Pattern Byte 2.
Secondary SKIP Pattern Byte 3.
Secondary SKIP Pattern Byte MSB.
64B/66B PCS Tx Path Control.
64B/66B PCS Tx FIFO Almost Full Setting.
64B/66B PCS Tx FIFO Almost Empty Setting.
64B/66B PCS Rx Path Control.
64B/66B PCS CTC High Water Line.
64B/66B PCS CTC Low Water Line.
64B/66B PCS Block Align Shift.
10GBASE-R Block Error Counter.
10GBASE-R Test Pattern Seed A Byte0.
10GBASE-R Test Pattern Seed A Byte1.
10GBASE-R Test Pattern Seed A Byte2.
10GBASE-R Test Pattern Seed A Byte3.
10GBASE-R Test Pattern Seed A Byte4.
10GBASE-R Test Pattern Seed A Byte5.
10GBASE-R Test Pattern Seed A Byte6.
10GBASE-R Test Pattern Seed A Byte7.
10GBASE-R Test Pattern Seed B Byte0.
10GBASE-R Test Pattern Seed B Byte1.