Scanlab RTC 5 PC Interface Board - 17.2.2 Interface to the CPU board; 17.2.3 Master;Slave Synchronization

RTC
®
5 PC Interface Board
Rev. 1.9 e
17 Appendix C: The RTC
®
5 PCIe/104 Board
602
innovators for industry
17.2.2 Interface to the CPU board
Data transfer between the CPU board and the
RTC
®
5 PCIe/104 board is via the PCI-Express bus. The
RTC
®
5 PCIe/104 board provides 156-pin PCIe/104
connectors (see figure 71 on page 601). The timing
and signal levels of the PCI signals are in compliance
with PCI-Express Base Specification Revision 2.0 and
with PCI Local Bus Specification Revision 2.3.
17.2.3 Master/Slave Synchronization
If multiple synchronously-clocked RTC
®
5 PCIe/104
boards are to be used in a PCIe/104 stack, then the
RTC
®
5 PCIe/104 boards must be connected pairwise
with each other via the MASTER and SLAVE
connectors and installed in adjacent stack positions.
Always connect a board’s MASTER connector to the
SLAVE connector of another board. Suitable
connection cables are available from SCANLAB.
Also see chapter 6.6.3 "Master/Slave Operation",
page 84 and "Starting and Stopping Lists via External
Control Signals and Master/Slave Synchronization",
page 209.
Legend
Master . . . . . . 6-pin MASTER connector (see "Master/Slave Synchronization", page 602)
JP1 . . . . . . . . . Jumper for selecting the output signal level at the MULTI connector (see page 586)
JP2 - JP8 . . . . . Jumpers for configuring Pin B40 and B42 of the MULTI connector (see page 586)
72
2
1
1
1
MASTER
PCI-Express
JP1
1
JP2
JP3JP4
JP6JP8
JP7 JP5
Layout of the RTC
®
5 PCIe/104 board (back side)
Caution!
•The RTC
®
5 PCIe/104 board does not support
power-saving modes that switch off power to
the PCI bus. Accordingly, you must disable
standby or sleep modes of the operating
system. Also see the note on page 27.