AT32F421 Series Reference Manual
2022.11.11 Page 313 Rev 2.02
18.4.5 Voltage monitoring
The OCVMEN bit or PCVMEN bit in the ADC_CTRL1 register is used to enable voltage monitoring based
on the converted data.
The VMOR bit will be set if the converted result is outside the high threshold (ADC_VMHB register) or
less than the low threshold (ADC_VMLB register).
The VMSGEN bit in the ADC_CTRL1 register is used to enable voltage monitor on either a single
channel or all the channels. The VMCSEL bit is used to select a specific channel that requires voltage
monitoring.
Voltage monitoring is based on the comparison result between the original converted data and the 12-
bit voltage monitor boundary register, irrespective of the PCDTOx and DTALIGN bits.
18.4.6 Status flag and interrupts
Each of the ADCs has its dedicated ADCx_STS registers, that is, OCCS (ordinary channel conversion
start flag), PCCS (preempted channel conversion start flag), PCCE (preempted channel conversion end
flag), OCCE (ordinary channel conversion end flag) and VMOR (voltage monitor out of range).
PCCE, CCE and VMOR have their respective interrupt enable bits. Once the interrupt bits are enabled,
the corresponding flag is set and an interrupt is sent to CPU.
18.5 ADC registers
Table 18-2 lists ADC register map and their reset values.
These peripheral registers must be accessed by word (32 bits).
Table 18-2 ADC register map and reset values
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