AT32F421 Series Reference Manual
2022.11.11 Page 91 Rev 2.02
7 System configuration controller (SCFG)
7.1 Introduction
This device contains a set of system configuration register. The system configuration controller is mainly
used to:
Remap some DMA trigger sources to other DMA channels
Manage the external interrupts connected to the GPIOs
7.2 SCFG registers
Table 7-1 shows SCFG register map and their reset values.
These peripheral registers must be accessed by words (32 bits).
Table 7- 1 SCFG register map and reset value
7.2.1 SCFG configuration register1 (SCFG_CFG1)
Kept at its default value.
TMR17 DMA request remap bit
This bit is set and cleared by software.
0x0: No remap (DMA requests for TMR17_CH1 and
TMR17_OVERFLOW are mapped on DMA channel 1).
0x1: Remap 1 (DMA request for TMR17_CH1 and
TMR17_OVERFLOW is mapped on DMA channel 2).
TMR16 DMA request remap bit
This bit is set and cleared by software.
0x0: No remap (DMA requests for TMR16_CH1 and
TMR16_OVERFLOW are remapped on DMA channel
3).
0x1: Remap 1 (DMA requests for TMR16_CH1 and
TMR16_OVERFLOW are remapped on DMA channel
4).
USART1 RX DMA request remap bit
This bit is set and cleared by software. It controls the
remapping for USART1 RX DMA channel requests.
0: No remap (DMA request for USART1_RX is mapped
on DMA channel 3)
1: Remap (DMA request for USART1_RX is mapped on
DMA channel 5).
USART1 TX DMA request remap bit
This bit is set and cleared by software. It controls the
remapping for USART1 TX DMA channel requests.
0: No remap (DMA request for USART1_TX is mapped
on DMA channel 2).
1: Remap (DMA request for USART1_TX is mapped on
DMA channel 4).
ADC DMA request remap bit
This bit is set and cleared by software. It controls the
remapping for ADC DMA channel requests.
0: No remap (ADC DMA request is remapped on DMA
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